If you have to distinguish between BTnode rev2 and BTnode rev3 in your program code use following if on def:
#if defined(__BTNODE3__)
program code for BTnode rev3
#else
program code for everything else (BTnode rev2, STK500, linux, ...)
#endif
|
Defines |
#define | APP_UART devUsartAvr0 |
#define | APP_UART_NR 0 |
#define | BAT_DIVIDER 2 |
#define | BAT_SENSE_ADC 3 |
#define | BT_POWER_ON_PIN 6 |
#define | BT_RADIO_TYPE ZEEVO |
#define | BT_RESET_PIN 7 |
#define | BT_UART devUsartAvr1 |
#define | BT_UART_INITIAL_DATABITS 8 |
#define | BT_UART_INITIAL_FLOWCONTROL UART_HS_RTSCTS |
#define | BT_UART_INITIAL_PARITY 0 |
#define | BT_UART_INITIAL_SPEED 115200 |
#define | BT_UART_INITIAL_STOPBITS 1 |
#define | BT_UART_NR 1 |
#define | CC1000_CONFIG_PORT PORTD |
#define | CC1000_CONFIG_PORT_REG DDRD |
#define | CC1000_PALE 5 |
#define | CC1000_PCLK 6 |
#define | CC1000_PDATA 7 |
#define | CC1000_POWER_ON_PIN 5 |
#define | CC1000_RSSI_ADC 2 |
#define | CONFIG_LATCH_INIT_VALUE 0x00 |
#define | CONFIG_LATCH_SELECT_DDR DDRB |
#define | CONFIG_LATCH_SELECT_PIN 5 |
#define | CONFIG_LATCH_SELECT_PORT PORTB |
#define | CPU_FREQ 7372800 |
#define | HAVE_CONFIG_LATCH |
#define | I2C_MASTER_TRIGGER_DDR DDRD |
#define | I2C_MASTER_TRIGGER_PIN 6 |
#define | I2C_MASTER_TRIGGER_PORT PORTD |
#define | IO_POWER_ON_PIN 4 |
#define | LED0 0 |
#define | LED1 1 |
#define | LED2 2 |
#define | LED3 3 |
#define | LED_PORT PORTC |
#define | LED_PORT_DDR DDRC |
#define | MCU_ATMEGA128 |
#define | NUTMEM_SIZE 4096 |
#define | NUTMEM_START 0x100 |
#define | NUTXMEM_SIZE 0xEF00 |
#define | NUTXMEM_START 0x1100 |
#define | RAM_CTR_A_DDR DDRB |
#define | RAM_CTR_A_PIN 7 |
#define | RAM_CTR_A_PORT PORTB |
#define | RAM_CTR_B_DDR DDRB |
#define | RAM_CTR_B_PIN 6 |
#define | RAM_CTR_B_PORT PORTB |
#define | sig_SUART_RECV sig_INTERRUPT4 |
#define | SUART_RXD 4 |
#define | SUART_RXD_INTERRUPT INT4 |
#define | SUART_RXD_PIN PINE |
#define | SUART_RXD_PORT PORTE |
#define | SUART_TXD 2 |
#define | SUART_TXD_PORT PORTE |
#define | SUART_TXD_PORT_DDR DDRE |
#define | UART0_CTS_BIT 4 |
#define | UART0_CTS_DDR DDRE |
#define | UART0_CTS_IRQ INT4 |
#define | UART0_RTS_AVRPORT AVRPORTE |
#define | UART0_RTS_BIT 2 |
#define | UART0_RTS_DDR DDRE |
#define | UART0_RTS_PORT PORTE |
#define | UART1_CTS_IRQ INT5 |
#define | UART1_NO_SW_FLOWCONTROL |
#define | UART1_READMULTIBYTE |
#define | UART1_RTS_AVRPORT AVRPORTD |
#define | UART1_RTS_BIT 4 |
#define | USE_USART1 |
#define | VCC_mV 3300 |
!!! Dieses Dokument stammt aus dem
ETH Web-Archiv und wird nicht mehr gepflegt !!!
!!! This document is stored in the
ETH Web archive and is no longer maintained !!!