Timer/Counter
[AT91]

Collaboration diagram for Timer/Counter:


Detailed Description

Timer / Counter registers.


Timer Counter Control Register

#define TC0_CCR
 Channel 0 control register address.
#define TC1_CCR
 Channel 1 control register address.
#define TC2_CCR
 Channel 2 control register address.
#define TC_CLKEN
 Clock enable command.
#define TC_CLKDIS
 Clock disable command.
#define TC_SWTRG
 Software trigger command.

Timer Counter Channel Mode Register

#define TC0_CMR
 Channel 0 mode register address.
#define TC1_CMR
 Channel 1 mode register address.
#define TC2_CMR
 Channel 2 mode register address.
#define TC_CLKS
 Clock selection mask.
#define TC_CLKS_MCK2
 Selects MCK / 2.
#define TC_CLKS_MCK8
 Selects MCK / 8.
#define TC_CLKS_MCK32
 Selects MCK / 32.
#define TC_CLKS_MCK128
 Selects MCK / 128.
#define TC_CLKS_MCK1024
 Selects MCK / 1024.
#define TC_CLKS_XC0
 Selects external clock 0.
#define TC_CLKS_XC1
 Selects external clock 1.
#define TC_CLKS_XC2
 Selects external clock 2.
#define TC_CLKI
 Increments on falling edge.
#define TC_BURST
 Burst signal selection mask.
#define TC_BURST_NONE
 Clock is not gated by an external signal.
#define TC_BUSRT_XC0
 ANDed with external clock 0.
#define TC_BURST_XC1
 ANDed with external clock 1.
#define TC_BURST_XC2
 ANDed with external clock 2.
#define TC_CPCTRG
 RC Compare Enable Trigger Enable.
#define TC_WAVE
 Selects waveform mode.
#define TC_CAPT
 Selects capture mode.

Capture Mode

#define TC_LDBSTOP
 Counter clock stopped on RB loading.
#define TC_LDBDIS
 Counter clock disabled on RB loading.
#define TC_ETRGEDG
 External trigger edge selection mask.
#define TC_ETRGEDG_RISING_EDGE
 Trigger on external rising edge.
#define TC_ETRGEDG_FALLING_EDGE
 Trigger on external falling edge.
#define TC_ETRGEDG_BOTH_EDGE
 Trigger on both external edges.
#define TC_ABETRG
 TIOA or TIOB external trigger selection mask.
#define TC_ABETRG_TIOB
 TIOB used as an external trigger.
#define TC_ABETRG_TIOA
 TIOA used as an external trigger.
#define TC_LDRA
 RA loading selection mask.
#define TC_LDRA_RISING_EDGE
 Load RA on rising edge of TIOA.
#define TC_LDRA_FALLING_EDGE
 Load RA on falling edge of TIOA.
#define TC_LDRA_BOTH_EDGE
 Load RA on any edge of TIOA.
#define TC_LDRB
 RB loading selection mask.
#define TC_LDRB_RISING_EDGE
 Load RB on rising edge of TIOA.
#define TC_LDRB_FALLING_EDGE
 Load RB on falling edge of TIOA.
#define TC_LDRB_BOTH_EDGE
 Load RB on any edge of TIOA.

Waveform Mode

#define TC_CPCSTOP
 Counter clock stopped on RC compare.
#define TC_CPCDIS
 Counter clock disabled on RC compare.
#define TC_EEVTEDG
 External event edge selection mask.
#define TC_EEVTEDG_RISING_EDGE
 External event on rising edge..
#define TC_EEVTEDG_FALLING_EDGE
 External event on falling edge..
#define TC_EEVTEDG_BOTH_EDGE
 External event on any edge..
#define TC_EEVT
 External event selection mask.
#define TC_EEVT_TIOB
 TIOB selected as external event.
#define TC_EEVT_XC0
 XC0 selected as external event.
#define TC_EEVT_XC1
 XC1 selected as external event.
#define TC_EEVT_XC2
 XC2 selected as external event.
#define TC_ENETRG
 External event trigger enable.
#define TC_ACPA
 Masks RA compare effect on TIOA.
#define TC_ACPA_SET_OUTPUT
 RA compare sets TIOA.
#define TC_ACPA_CLEAR_OUTPUT
 RA compare clears TIOA.
#define TC_ACPA_TOGGLE_OUTPUT
 RA compare toggles TIOA.
#define TC_ACPC
 Masks RC compare effect on TIOA.
#define TC_ACPC_SET_OUTPUT
 RC compare sets TIOA.
#define TC_ACPC_CLEAR_OUTPUT
 RC compare clears TIOA.
#define TC_ACPC_TOGGLE_OUTPUT
 RC compare toggles TIOA.
#define TC_AEEVT
 Masks external event effect on TIOA.
#define TC_AEEVT_SET_OUTPUT
 External event sets TIOA.
#define TC_AEEVT_CLEAR_OUTPUT
 External event clears TIOA.
#define TC_AEEVT_TOGGLE_OUTPUT
 External event toggles TIOA.
#define TC_ASWTRG
 Masks software trigger effect on TIOA.
#define TC_ASWTRG_SET_OUTPUT
 Software trigger sets TIOA.
#define TC_ASWTRG_CLEAR_OUTPUT
 Software trigger clears TIOA.
#define TC_ASWTRG_TOGGLE_OUTPUT
 Software trigger toggles TIOA.
#define TC_BCPB
 Masks RB compare effect on TIOB.
#define TC_BCPB_SET_OUTPUT
 RB compare sets TIOB.
#define TC_BCPB_CLEAR_OUTPUT
 RB compare clears TIOB.
#define TC_BCPB_TOGGLE_OUTPUT
 RB compare toggles TIOB.
#define TC_BCPC
 Masks RC compare effect on TIOB.
#define TC_BCPC_SET_OUTPUT
 RC compare sets TIOB.
#define TC_BCPC_CLEAR_OUTPUT
 RC compare clears TIOB.
#define TC_BCPC_TOGGLE_OUTPUT
 RC compare toggles TIOB.
#define TC_BEEVT
 Masks external event effect on TIOB.
#define TC_BEEVT_SET_OUTPUT
 External event sets TIOB.
#define TC_BEEVT_CLEAR_OUTPUT
 External event clears TIOB.
#define TC_BEEVT_TOGGLE_OUTPUT
 External event toggles TIOB.
#define TC_BSWTRG
 Masks software trigger effect on TIOB.
#define TC_BSWTRG_SET_OUTPUT
 Software trigger sets TIOB.
#define TC_BSWTRG_CLEAR_OUTPUT
 Software trigger clears TIOB.
#define TC_BSWTRG_TOGGLE_OUTPUT
 Software trigger toggles TIOB.

Counter Value Register

#define TC0_CV
 Counter 0 value.
#define TC1_CV
 Counter 1 value.
#define TC2_CV
 Counter 2 value.

Timer Counter Register A

#define TC0_RA
 Channel 0 register A.
#define TC1_RA
 Channel 1 register A.
#define TC2_RA
 Channel 2 register A.

Timer Counter Register B

#define TC0_RB
 Channel 0 register B.
#define TC1_RB
 Channel 1 register B.
#define TC2_RB
 Channel 2 register B.

Timer Counter Register C

#define TC0_RC
 Channel 0 register C.
#define TC1_RC
 Channel 1 register C.
#define TC2_RC
 Channel 2 register C.

Timer Counter Status and Interrupt Registers

#define TC0_SR
 Status register address.
#define TC1_SR
 Status register address.
#define TC2_SR
 Status register address.
#define TC0_IER
 Channel 0 interrupt enable register address.
#define TC1_IER
 Channel 1 interrupt enable register address.
#define TC2_IER
 Channel 2 interrupt enable register address.
#define TC0_IDR
 Channel 0 interrupt disable register address.
#define TC1_IDR
 Channel 1 interrupt disable register address.
#define TC2_IDR
 Channel 2 interrupt disable register address.
#define TC0_IMR
 Channel 0 interrupt mask register address.
#define TC1_IMR
 Channel 1 interrupt mask register address.
#define TC2_IMR
 Channel 2 interrupt mask register address.
#define TC_COVFS
 Counter overflow flag.
#define TC_LOVRS
 Load overrun flag.
#define TC_CPAS
 RA compare flag.
#define TC_CPBS
 RB compare flag.
#define TC_CPCS
 RC compare flag.
#define TC_LDRAS
 RA loading flag.
#define TC_LDRBS
 RB loading flag.
#define TC_ETRGS
 External trigger flag.
#define TC_CLKSTA
 Clock enable flag.
#define TC_MTIOA
 TIOA flag.
#define TC_MTIOB
 TIOB flag.

Timer Counter Block Control Register

#define TC_BCR
 Block control register address.
#define TC_SYNC
 Synchronisation trigger.

Timer Counter Block Mode Register

#define TC_BMR
 Block mode register address.
#define TC_TC0XC0S
 External clock signal 0 selection mask.
#define TC_TCLK0XC0
 Selects TCLK0.
#define TC_NONEXC0
 None selected.
#define TC_TIOA1XC0
 Selects TIOA1.
#define TC_TIOA2XC0
 Selects TIOA2.
#define TC_TC1XC1S
 External clock signal 1 selection mask.
#define TC_TCLK1XC1
 Selects TCLK1.
#define TC_NONEXC1
 None selected.
#define TC_TIOA0XC1
 Selects TIOA0.
#define TC_TIOA2XC1
 Selects TIOA2.
#define TC_TC2XC2S
 External clock signal 2 selection mask.
#define TC_TCLK2XC2
 Selects TCLK2.
#define TC_NONEXC2
 None selected.
#define TC_TIOA0XC2
 Selects TIOA0.
#define TC_TIOA1XC2
 Selects TIOA1.

Defines

#define TC_BASE
 TC base address.


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